Advanced ASIC Chip Synthesis: Using Synopsys® …

Description :Designing a complex ASIC/SoC is similar to learning a new language to start with and ultimately creating a masterpiece using experience, imagination, and creativity. Digital design starts with RTL suc...

Advanced ASIC Chip Synthesis ..

Description :Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler® and PrimeTime® describes the advanced concepts and techniques used for ASIC chip synthesis, formal verification and static timing anal...


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Free Ebook Advanced ASIC Chip Synthesis: Using …

AMCC in San DIego April 1984 - Jan 1995 Director of Customer Training Bipolar arrays, B2CMOS arrays; CMOS arrays; Schematic capture workstations including Daisy Logician; Created the ASIC design flow; authored the User Manuals for the Q700, Q1500, Q3500, Q5000, Bipolar Arrays; B2CMOS design manuals; Specified the first ERC/DRC rule checking for ASICs (Became a leading tool for users. Features are in today's software) Ran training classes up until January 1995 when AMCC dropped ASIC as a product line.


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IMP in San Jose 1995 - 1997 Manager, Created material including Aplication notes; datasheets; created their first website; Supported the Analog ASIC project ; marketing support